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Interfacial Chemical and Electrical Performance Study and Thermal Annealing Refinement for AlTiO/4H-SiC MOS
Yu-Xuan Zeng1,2, Wei Huang1,2, Hong-Ping Ma1,2,3
1Institute of Wide Bandgap Semiconductors and Future Lighting, Academy for Engineering & Technology, Fudan University, Shanghai 200433, China.
Nanomaterials (Basel, Switzerland)
|June 11, 2025
Summary
This study developed a composite aluminum titanium oxide (AlTiO) gate dielectric for silicon carbide (SiC) power devices using atomic layer deposition (ALD). Annealing improved the AlTiO dielectric
Area of Science:
- Materials Science
- Semiconductor Device Physics
Background:
- Gate reliability is critical for silicon carbide (SiC) power devices.
- Conventional heat oxidation for gate dielectrics presents limitations.
Purpose of the Study:
- To develop a high-quality composite gate dielectric for 4H-SiC substrates.
- To investigate the effect of annealing on the properties of AlTiO gate dielectrics.
Main Methods:
- Atomic Layer Deposition (ALD) of AlTiO composite dielectric using TDMAT and TMA precursors.
- Post-deposition annealing in Ar or N2 from 300 °C to 700 °C.
- X-ray Photoelectron Spectroscopy (XPS) for film quality analysis.
- Electrical characterization of Metal-Oxide-Semiconductor (MOS) capacitor performance.
Main Results:
- High-quality AlTiO films with enhanced interfacial bonding were deposited.
- Annealing improved the AlTiO bandgap and band alignment.
- MOS capacitor performance showed significant enhancement: leakage current reduced to ~10^-6 A/cm^2 and breakdown field increased to 7.2 MV/cm.
Conclusions:
- ALD enables tuning of composite gate dielectric properties for SiC devices.
- Thermal annealing is crucial for optimizing AlTiO/SiC MOS capacitor performance.
- The developed AlTiO dielectric shows promise for advanced SiC power applications.
