Study on Dry Etching of iCVD-Grown pV3D3 Dielectric Polymer Film

Polymer dielectric materials are promising candidates for next-generation electronics due to their cost-effectiveness, molecular-level structural tunability, and mechanical deformability. Among various fabrication techniques, initiated chemical vapor deposition (iCVD) enables high-purity polymer dielectric films with robust insulating properties. However, the lack of high-resolution patterning techniques has hindered their integration into high-density electronics. Here, the dry etching process of an organosilicon polymer dielectric layer fabricated via iCVD process is systematically investigated by using reactive ion etching (RIE) with CF₄ plasma. Direct mode RIE enabled a higher etch rate owing to the combined physical and chemical etching mechanisms, whereas remote mode RIE provided uniform etching with minimal perturbation on the surface morphology. Furthermore, introducing O₂ gas in CF₄ RIE significantly enhanced the etch rate in both modes, reaching ≈1 000 Å min^-1, despite localized pattern distortions caused by SiO_x formation. To validate its applicability, an ultrathin (≈33 nm), RIE-patterned polymer dielectric layer was implemented in an AlGaN/GaN-based metal-insulator-semiconductor high electron mobility transistor (MISHEMT), where the effective gate modulationwas achieved, along with a decent transconductance (≈1.5 mS) and a high current on/off ratio (>10⁸). This study establishes a systematic, high-resolution dry etching method for the vapor-phase deposited, crosslinked polymer dielectric layer, paving the way toward high-density electronics.