Optimized low power hybrid adder architecture for OFDM in wireless communication.

Area of Science:

• Electrical Engineering
• Computer Engineering

Background:

• Orthogonal frequency division multiplexing (OFDM) is vital for efficient wireless communication, adapting to diverse channel conditions.
• Adder circuits are critical but power-hungry components within OFDM transceivers.

Purpose of the Study:

• To propose an efficient hybrid adder design for wide word length addition in OFDM systems.
• To reduce power consumption and transistor count in OFDM architectures.

Main Methods:

• A hybrid four-bit carry generator combining Carry Select Adder (CSA) and Ripple Carry Adder (RCA) styles was developed.
• RC style was used for the first three bits, and CSA for the fourth bit to balance power and speed.
• Simulations were performed using Tanner tool (45nm technology) and analyzed in MATLAB.

Main Results:

• The hybrid adder achieved a 41.12% improvement in Power-Delay Product (PDP).
• Average power consumption was reduced by 23.15%, with a propagation delay of 20.21%.
• In OFDM simulations, Additive White Gaussian Noise (AWGN) showed a better Signal-to-Noise Ratio (SNR) than Rayleigh channels.

Conclusions:

• The proposed hybrid adder offers significant power and performance benefits for OFDM systems.
• This design contributes to more efficient and faster wireless communication transceivers.
• AWGN channels provide superior performance in OFDM systems compared to Rayleigh channels.