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Updated: Sep 10, 2025

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Published on: October 23, 2018
Strategic defect engineering at the buried interface for metal-halide transistors
Hyo-Won Jang1, Go-Eun Kim1, Mi-Jeong Kim2
1School of Electrical and Electronics Engineering, Chung-Ang University, Seoul, 06974, Korea. hyuckin@cau.ac.kr.
None:
Copper iodide (CuI), identified as a promising p-type semiconductor with solution processability, has recently gained significant interest. However, the defects and vacancy states of CuI that critically correspond to the performance of transistors are rarely explored. In this work, we propose a synergistic processing strategy for defect engineering at the buried interface of CuI thin film transistors (TFTs). Ambient-dependent processing, including in O2, vacuum, and H2 environments, is performed, and electrical, optical, and surficial analyses elucidate defect engineering in terms of copper and iodine vacancy states, as well as surface density. The optimized H2 processing is revealed to enhance the properties of CuI, where hydrogen can act as a shallow donor that compensates for the copper vacancies and induces the formation of iodine vacancies. The corresponding defect-engineering mechanism is discussed in CuI TFTs with different metal electrodes, revealing that the reduction of copper vacancy defects can be accelerated at the buried CuI channel/nickel interfaces owing to the formation of a significant hydrogen transfer pathway. This yields remarkable performance with long-term stability in CuI TFTs and improves the contact properties at the buried interface. This study advances the field toward the development of novel defect modulation techniques to produce high-performance solution-processed CuI TFTs.
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