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Updated: May 8, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
Published on: July 24, 2015
Probing defect formation in sulfur-annealed graphene for TMDC integration
Ahmad Nizamuddin Muhammad Mustafa1,2, Victoria Greenacre3, Huanyu Zhou4
1Department of Materials, Imperial College London, London SW7 2AZ, UK. a.bin-muhammad-mustafa21@imperial.ac.uk.
None:
The integration of graphene with other 2D materials has been extensively studied over the past decade to realize high-performance devices unattainable with single materials. Graphene-transition metal dichalcogenides (TMDCs) such as MoS2, WS2, MoSe2, and WSe2 vertical heterostructures have demonstrated promise in numerous electronic and optoelectronic applications due to the wide bandgap range and strong light-matter interaction in TMDCs, and the ability to form electrostatically tunable junctions with graphene. However, conventional methods for TMDCs growth, including chemical vapor deposition (CVD), electrodeposition, and atomic layer deposition (ALD), require high temperatures, which can degrade graphene's electrical and structural properties. Here, we investigate the impact of sulfur annealing on graphene, revealing significant etching and electrical degradation. Density functional theory (DFT) calculations identify the divacancy defect with two sulfur adatoms (DV-2S) and C-S-C bonds as the dominant defect, differing from the previously reported monovacancy with one sulfur adatom (MV-1S). This defect induces p-doping in graphene, consistent with experimental observations. To address these challenges, we introduce a protective strategy utilizing self-assembled monolayers (SAMs) during annealing, enabling the growth of high-quality WS2 on graphene via electrodeposition. Our findings provide a foundation for integrating TMDCs with graphene while preserving its properties, advancing high-performance electronic and optoelectronic applications.
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