Related Experiment Video
Updated: Sep 9, 2025

05:57
Characterization of SiN Integrated Optical Phased Arrays on a Wafer-Scale Test Station
Published on: April 1, 2020
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On-chip high-speed and multilevel passive NOT gate on a silicon photonic platform
Optics Letters
|August 29, 2025
Abstract:
We present the first, to the best of our knowledge, passive on-chip Boolean NOT gate using a phase-only waveguide Bragg grating (WBG) on a silicon-on-insulator platform. The spiral geometry enables a compact 0.25-mm2 footprint while achieving inversion of 50-Gbps PAM-2 and 45-Gbps PAM-3 signals without active or nonlinear components. This demonstration paves the way for high-speed logic operations in integrated photonic circuits.
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