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Related Concept Videos

Design Example: Capacitance Multiplier Circuit01:20

Design Example: Capacitance Multiplier Circuit

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In integrated circuit technology, a capacitance multiplier is often utilized to produce a larger capacitance value when a small physical capacitance falls short. This is achieved by a circuit that multiplies capacitance values by a factor of up to 1000, such that a 10-pF capacitor can replicate the performance of a 100-nF capacitor.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
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Quasi-light Storage for Optical Data Packets
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Frequency-multiplexed optical reservoir computing using a microcomb.

Jonathan Cuevas1, Yue Hu2, Baoqi Shi2

  • 1Graduate School of Sciences and Technology for Innovation, Tokushima, Japan.

Nanophotonics (Berlin, Germany)
|September 19, 2025
PubMed
Summary
This summary is machine-generated.

This study introduces a novel frequency-multiplexed optical reservoir computing (ORC) system using microcomb modes. This approach achieves high-speed temporal inference, overcoming limitations of previous ORC designs for faster, integrated photonic processors.

Keywords:
microresonatoroptical frequency combreservoir computing

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Area of Science:

  • Photonics
  • Optical Computing
  • Nonlinear Dynamics

Background:

  • Optical reservoir computing (ORC) offers potential for fast, energy-efficient temporal inference.
  • Existing ORC systems face limitations in clock rate and monolithic integration due to reliance on fiber delay lines or spatial multiplexing.

Purpose of the Study:

  • To develop a frequency-multiplexed ORC architecture for enhanced speed and scalability.
  • To leverage the dynamics of a microcomb in a silicon nitride microresonator for high-dimensional nonlinear mapping and memory.

Main Methods:

  • Utilized a dissipative Kerr-soliton microcomb generated in a high-Q Si3N4 microresonator as the computing nodes.
  • Encoded input signals via rapid pump laser detuning modulation.
  • Implemented optical output weighting using microring resonator arrays.

Main Results:

  • Numerical modeling demonstrated a normalized mean-square error (NMSE) of 0.015 on the Santa Fe chaotic time-series task at 50 MSa/s.
  • Achieved over a tenfold reduction in symbol-error rate for nonlinear equalization (NLEQ) at 100 MSa/s.
  • Experimental validation using 37 microcomb modes confirmed performance on benchmark tasks.

Conclusions:

  • The frequency-multiplexed ORC architecture effectively addresses scalability and speed challenges in nanophotonic computing.
  • CMOS-compatible fabrication offers a pathway to compact, energy-efficient photonic processors operating beyond 1 GSa/s.