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Related Experiment Video

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Lensfree On-chip Tomographic Microscopy Employing Multi-angle Illumination and Pixel Super-resolution

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Closing the loop in next-generation sensing through shadow sphere lithography, plasmonics, and artificial

Mingyu Cheng¹, Xinyi Chen¹, Jinglan Zhang¹

¹School of Microelectronics and Communication Engineering, Chongqing Key Laboratory of Bio-perception & Intelligent Information Processing, Chongqing University, Chongqing, 400044, P.R. China. binai@cqu.edu.cn.

Chemical Society Reviews

|September 23, 2025

Summary

Converging plasmonic nanostructure design, fabrication, and AI analytics enables advanced sensors. This approach meets demands for accuracy and speed in intelligent platforms, driving future innovations.

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Area of Science:

Nanotechnology
Photonics
Artificial Intelligence

Background:

Conventional transducers struggle with demands from intelligent energy, healthcare, and manufacturing platforms.
Plasmonic micro- and nano-optical sensors offer potential but require integration of design, fabrication, and signal processing.

Purpose of the Study:

To provide an end-to-end review of the convergence of nanostructure design, fabrication, and AI for plasmonic sensors.
To highlight advancements and outline a roadmap for future sensor development.

Main Methods:

Review of research from 2019-2024, focusing on shadow-sphere lithography (SSL) for scalable patterning.
Mapping nanostructures to plasmonic, lattice, and bound-state resonances.
Application of physics-aware artificial intelligence (AI) pipelines for signal processing and design inversion.

Main Results:

Shadow-sphere lithography (SSL) enables scalable, sub-50 nm patterning for plasmonic sensors.
AI pipelines effectively denoise spectra, compensate for variability, and enhance prediction accuracy.
A closed-loop roadmap linking SSL, plasmonics, and AI analytics is proposed for high-resolution sensing.

Conclusions:

The convergence of nanophotonics, scalable fabrication, and AI analytics is crucial for next-generation sensors.
Future work should address challenges in 3D patterning, self-assembly, and adaptive signal interpretation for wafer-scale integration.