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Updated: Jan 14, 2026

A Photonic System for Generating Unconditional Polarization-Entangled Photons Based on Multiple Quantum Interference
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Efficient FPGA implementation of polar codes-based information reconciliation for quantum key distribution.

Lianye Liao1,2, Xinyi Wu1,2, Ye Chen1,2

  • 1School of Electronics and Communication Engineering, Sun Yat-sen University, Shenzhen, Guangdong, 518107, P.R. China.

Scientific Reports
|October 16, 2025
PubMed
Summary

We developed a hardware accelerator for quantum key distribution (QKD) information reconciliation (IR) using polar codes on an FPGA. This cost-effective solution significantly boosts QKD system performance and security.

Keywords:
Discrete variable quantum key distribution (DV-QKD)Field programmable gate array (FPGA)Information reconciliation (IR)Polar codes

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Area of Science:

  • Quantum Information Science
  • Telecommunications Engineering
  • Computer Architecture

Background:

  • Quantum key distribution (QKD) ensures secure communication using quantum mechanics.
  • Information reconciliation (IR) is crucial for QKD, correcting errors in shared keys.
  • Polar codes offer efficient IR but current CPU/GPU implementations lack performance and energy efficiency.

Purpose of the Study:

  • To design and implement a hardware accelerator for polar codes-based IR in discrete variable QKD (DV-QKD).
  • To overcome the performance and energy efficiency limitations of existing CPU/GPU-based IR solutions.
  • To provide a cost-effective, high-throughput solution for real-time QKD security.

Main Methods:

  • Developed a hardware accelerator on a cost-effective FPGA platform for DV-QKD IR.
  • Utilized a module-level pipeline parallel structure for high throughput and scalability.
  • Implemented a fully parallelized decoding strategy and a hybrid memory architecture for enhanced decoder efficiency and resource utilization.

Main Results:

  • Achieved an IR throughput of 35.33 Mbps for a block size of [Formula: see text].
  • Demonstrated a real-time, cost-efficient solution for QKD information reconciliation.
  • Validated the effectiveness of the FPGA-based hardware accelerator in enhancing QKD system performance.

Conclusions:

  • The FPGA-based hardware accelerator offers a significant advancement for polar codes-based IR in QKD systems.
  • This solution provides a practical and efficient method to enhance the security and performance of quantum communication.
  • The design achieves high throughput and scalability, making it suitable for real-world QKD deployments.