Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Related Concept Videos

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by
Same author

Dielectric levitation optical tweezers for powerful mesoscale biomanipulation.

Proceedings of the National Academy of Sciences of the United States of America·2026
Same author

Case Report: Optic nerve infiltration associated with sequential CRVO and CRAO in isolated CNS relapse of AML.

Frontiers in medicine·2026
Same author

A Simulation Study of a Bandpass Filter Formed by CNT-Core Cu-TSVs with Enhanced Thermal Management.

Micromachines·2026
Same author

Fiber-Degrading Microorganisms: Types, Screening and Applications.

Life (Basel, Switzerland)·2026
Same author

Phytase modulates amino acid and mineral ion release kinetics: Ingredient-specific responses in plant protein ingredients.

Current research in food science·2026
Same author

Aperture-layout-induced effects in polarization-resolved multifocal metalenses based on plasmonic quarter-wave plates.

Optics letters·2026

Related Experiment Video

Updated: Jan 14, 2026

Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology
09:20

Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology

Published on: December 7, 2015

8.1K

A contamination-free and low-leakage-current Cu-TSV technology enabled by engineered double-sided processing.

Yigang Hao1, Yingtao Ding1, Ziyue Zhang2

  • 1School of Integrated Circuits and Electronics, Beijing Institute of Technology, 100081, Beijing, China.

Microsystems & Nanoengineering
|October 28, 2025
PubMed
Summary

A new fabrication method for through-silicon vias (TSVs) uses polyimide-Ni (PI-Ni) layers to simplify manufacturing and enhance chiplet integration. This contamination-free approach improves TSV performance and reliability for advanced microsystems.

More Related Videos

Close-Space Sublimation-Deposited Ultra-Thin CdSeTe/CdTe Solar Cells for Enhanced Short-Circuit Current Density and Photoluminescence
12:21

Close-Space Sublimation-Deposited Ultra-Thin CdSeTe/CdTe Solar Cells for Enhanced Short-Circuit Current Density and Photoluminescence

Published on: March 6, 2020

8.7K
Microfluidics-based High-throughput Circulating Tumor Cell Sorting and Single-cell Sequencing Technology
09:45

Microfluidics-based High-throughput Circulating Tumor Cell Sorting and Single-cell Sequencing Technology

Published on: November 14, 2025

533

Related Experiment Videos

Last Updated: Jan 14, 2026

Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology
09:20

Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology

Published on: December 7, 2015

8.1K
Close-Space Sublimation-Deposited Ultra-Thin CdSeTe/CdTe Solar Cells for Enhanced Short-Circuit Current Density and Photoluminescence
12:21

Close-Space Sublimation-Deposited Ultra-Thin CdSeTe/CdTe Solar Cells for Enhanced Short-Circuit Current Density and Photoluminescence

Published on: March 6, 2020

8.7K
Microfluidics-based High-throughput Circulating Tumor Cell Sorting and Single-cell Sequencing Technology
09:45

Microfluidics-based High-throughput Circulating Tumor Cell Sorting and Single-cell Sequencing Technology

Published on: November 14, 2025

533

Area of Science:

  • Materials Science
  • Electrical Engineering
  • Semiconductor Manufacturing

Background:

  • Through-silicon vias (TSVs) are essential for heterogeneous integration of chiplets, enabling vertical interconnects.
  • Current TSV fabrication methods face challenges with complexity, copper contamination, and leakage current.

Purpose of the Study:

  • Introduce a novel TSV fabrication technology using double-sided polyimide-Ni (PI-Ni) functional layers.
  • Simplify the TSV manufacturing flow and improve TSV performance and reliability.

Main Methods:

  • Developed a double-sided polyimide insulation layer deposition process with pre-metallization chemical mechanical polishing (CMP).
  • Utilized an optimized double-sided electroless plating process for a continuous Nickel (Ni) barrier and seed layer.
  • Enabled simultaneous electroplating of TSV copper (Cu) conductors and redistribution layers (RDLs).

Main Results:

  • Achieved complete substrate coverage with through-holes and prevented metallic contamination.
  • Demonstrated high step coverage for the Ni layer, facilitating simultaneous plating.
  • Validated improved thermo-mechanical stress distribution and superior electrical performance (reduced parasitic capacitance, ultra-low leakage current).

Conclusions:

  • The PI-Ni-based TSV fabrication technology offers a simplified, contamination-free solution.
  • This method enhances TSV performance and reliability for advanced heterogeneous integration.
  • The technology is suitable for post-Moore applications like IC chips and MEMS devices.