Design and Implementation of a YOLOv2 Accelerator on a Zynq-7000 FPGA

Area of Science:

• Computer Engineering
• Artificial Intelligence
• Embedded Systems

Background:

• Object detection algorithms like You Only Look Once (YOLO) are crucial for real-time vision but demand high computational power.
• Graphics Processing Units (GPUs) are power-intensive, making them unsuitable for low-power applications.
• Field-Programmable Gate Arrays (FPGAs) offer a power-efficient alternative but require specialized optimization for efficient implementation.

Purpose of the Study:

• To develop an optimized YOLOv2 accelerator for the Zynq-7000 System-on-Chip (SoC).
• To enhance resource efficiency and reduce power consumption for YOLOv2 deployment on FPGAs.
• To maintain high accuracy while minimizing hardware resource utilization.

Main Methods:

• Implemented YOLOv2 using 16-bit integer quantization.
• Employed a filter reuse structure and an input feature map reuse scheme with a line buffer.
• Optimized tiling parameters for convolution and max pooling layers.
• Introduced a stall-based control mechanism to prevent pipeline hazards.

Main Results:

• Achieved a negligible accuracy drop of 0.2% compared to the 32-bit floating-point baseline.
• Reduced flip-flop (FF) and Digital Signal Processor (DSP) usage by up to 26% and 15%, respectively, compared to previous YOLO accelerators on the same SoC.
• Demonstrated feasible deployment on the XC7Z020, utilizing 57.27% DSP and 16.55% FF resources.

Conclusions:

• The optimized YOLOv2 accelerator offers a power-efficient and resource-efficient solution for real-time object detection on FPGAs.
• The design successfully balances performance, accuracy, and hardware resource utilization on the Zynq-7000 SoC.
• This work enables the practical deployment of advanced object detection models in resource-constrained embedded systems.