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Demonstration of TFTs 3D monolithically integrated on GaN HEMTs using cascode configuration with high breakdown
Tian-Li Wu1,2, Hsin-Jou Ho3, Chia-Wei Liu3
1Institue of Electronics and Department Electronics and Electrical Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan. tlwu@nycu.edu.tw.
None:
This work demonstrates, for the first time, the three-dimensional monolithic integration of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) directly on gallium nitride (GaN) high electron mobility transistors (HEMTs) in a cascode configuration, achieving a breakdown voltage exceeding 1900 V. Two device variants were fabricated with a-IGZO channel thicknesses of 30 and 10 nm, enabling a direct evaluation of the impact of channel thickness on device performance. The 10 nm channel device exhibits a positive threshold voltage of approximately + 0.53 V, an ON/OFF current ratio of about 107, a low subthreshold swing (90 mV/dec), and a high breakdown voltage (> 1900 V) comparable to that of standalone GaN power HEMTs with the same gate-drain spacing. These performance gains are attributed to reduced channel thickness, which suppresses leakage and improves electrostatic control, combined with the high breakdown capability of the underlying GaN HEMT. The results confirm the feasibility of 3D monolithic integration of a-IGZO TFTs on GaN HEMTs for cascode operation, providing a viable path toward compact, high-voltage oxide-based and Gallium-based devices.
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