Wafer-Scale Monolayer MoS₂ with Tunable Grain Size via Grain Boundary Engineering for Neuromorphic Computing

Area of Science:

• Materials Science
• Nanotechnology
• Condensed Matter Physics

Background:

• Grain boundaries (GBs) in 2D materials are shifting from defects to functional elements.
• Engineering GBs offers a pathway to tailor material properties for electronic applications.

Purpose of the Study:

• To develop a grain-boundary engineering strategy for wafer-scale monolayer MoS2.
• To investigate the impact of controlled grain sizes on memtransistor performance.
• To explore the potential of GB-engineered MoS2 in neuromorphic systems.

Main Methods:

• Utilized a diameter-tunable chemical vapor deposition (DT-CVD) technique for controlled MoS2 growth.
• Systematically tuned GB density by adjusting quartz tube diameter.
• Performed structural, spectroscopic, and electrical characterizations, including device fabrication and neural network simulations.

Main Results:

• Achieved wafer-scale monolayer MoS2 with tunable grain sizes and controlled GB density.
• Demonstrated that increased GB density introduces shallow energy barriers and band bending, enabling tunable analog switching.
• Observed synergistic effects of charge trapping and ionic migration governing resistive switching.
• Developed MoS2 memristors with optimal analog precision and cycling endurance, supporting 64-level conductance modulation and long-term synaptic plasticity.

Conclusions:

• GB engineering in MoS2 is a viable strategy for creating high-performance memristors.
• The developed DT-CVD method allows precise control over GBs for tailored electronic properties.
• GB-engineered MoS2 memristors show significant promise for next-generation energy-efficient neuromorphic computing systems.