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Coplanar Floating-Gate Antiferroelectric Transistor with Multifunctionality for All-in-One Analog Reservoir
Yufei Shi1, Zijie Zheng1, Jiali Huo1
1Department of Electrical and Computer Engineering, National University of Singapore, 4 Engineering Drive 3, Singapore, 117583, Singapore.
Nano-Micro Letters
|January 8, 2026
Summary
Researchers developed a single floating-gate antiferroelectric transistor (FG AFeFET) for energy-efficient analog reservoir computing (ARC). This unified device simplifies hardware, enabling high accuracy on complex datasets like MNIST.
Area of Science:
- Neuromorphic Engineering
- Materials Science
- Solid-State Electronics
Background:
- Analog reservoir computing (ARC) offers energy-efficient temporal information processing.
- Current ARC implementations require complex, multi-material device architectures, hindering scalability and efficiency.
- Need for integrated, simplified hardware solutions for advanced computing paradigms.
Purpose of the Study:
- To present a novel, unified device architecture for implementing a complete ARC system.
- To demonstrate a coplanar floating-gate antiferroelectric field-effect transistor (FG AFeFET) capable of multiple neural functionalities.
- To explore the potential of FG AFeFETs for area-efficient and design-flexible neuromorphic hardware.
Main Methods:
- Fabrication of a coplanar FG AFeFET architecture.
- Integration of volatile (neuron), nonvolatile (synaptic), and fading memory functionalities within a single device.
- Systematic elucidation of device mechanisms using load line analysis and energy band diagrams.
- Demonstration of an all-in-one ARC system for pattern recognition tasks.
Main Results:
- Achieved tunable device behaviors including volatile responses, nonvolatile synaptic functions, and fading memory dynamics.
- Demonstrated high recognition accuracies of 95.6% on MNIST and 83.4% on Fashion-MNIST datasets using the FG AFeFET-based ARC system.
- Verified the effectiveness of coplanar layout and area ratio engineering for device functionality.
Conclusions:
- The unified coplanar FG AFeFET architecture successfully integrates essential neural computing functions into a single device.
- This approach significantly simplifies fabrication and increases the efficiency of ARC systems.
- Coplanar FG AFeFETs represent a promising pathway towards area-efficient, flexible neuromorphic hardware for future computing systems.
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