Single atom Ru-supported reduced graphene oxide integrated self-assembled monolayer as a nm-scale Cu diffusion...

Area of Science:

• Materials Science
• Electrical Engineering
• Nanotechnology

Background:

• Interconnect resistance in advanced integrated circuits causes signal delay, hindering electronic device development.
• Conventional tantalum nitride/tantalum (TaN/Ta) barriers are too thick and increase resistance due to the size effect.
• Developing effective copper (Cu) diffusion barrier materials is essential for next-generation electronics.

Purpose of the Study:

• To design and evaluate an ultra-thin integrated diffusion barrier for advanced copper interconnects.
• To combine the functions of a liner and a barrier using novel materials.
• To improve the reliability and performance of integrated circuits.

Main Methods:

• Designed an integrated ultra-thin diffusion barrier (~1.4 nm) using single-atom ruthenium-supported reduced graphene oxide (Ru SA-rGO) and a self-assembled monolayer (SAM).
• Utilized nitrogen (N)-doping to support the ruthenium (Ru) atoms on the reduced graphene oxide (rGO).
• Tested the barrier performance by measuring the mean time-to-failure in devices.

Main Results:

• The Ru SA-rGO/SAM barrier demonstrated dual functionality as both a liner and a barrier.
• Ruthenium (Ru) atoms physically blocked copper (Cu) diffusion by filling vacancies and chemically captured Cu via enhanced adsorption.
• Devices with the Ru SA-rGO/SAM barrier showed a mean time-to-failure approximately 24 times longer than barrier-free devices.

Conclusions:

• The developed ultra-thin Ru SA-rGO/SAM barrier effectively prevents copper diffusion in advanced interconnects.
• This approach offers a promising solution to overcome the limitations of conventional barriers in integrated circuits.
• The study provides valuable insights into the development of advanced diffusion barriers for future electronic devices.