A 7 mHz-6.29 Hz Configurable High-Pass Analog Front-End With Direct Tunneling Biasing and Output DC-Servo Loop.

Area of Science:

• Analog circuit design
• Biomedical electronics
• CMOS integrated circuits

Background:

• Accurate signal acquisition at very low frequencies is crucial for various applications.
• Traditional analog front-ends face challenges in achieving ultra-low cutoff frequencies and high input impedance simultaneously.
• Maintaining DC operating point stability is essential for reliable analog signal processing.

Purpose of the Study:

• To introduce a novel capacitively coupled analog front-end with an adjustable high-pass cutoff frequency.
• To achieve an ultra-low high-pass cutoff frequency of 7mHz.
• To enhance input impedance and stability for low-frequency signal acquisition.

Main Methods:

• Utilizing a dynamic equilibrium of direct tunneling (DT) current for DC operating point setting.
• Implementing an output DC-servo loop (O-DSL) with a duty-cycled operational transconductance amplifier (DC-OTA) and a digital-assistant transconductance amplifier (DA-OTA).
• Employing a positive feedback capacitor and a dual loop control mechanism for improved input impedance.

Main Results:

• Achieved an equivalent transconductance as low as 0.18 pA/V using DC-OTA techniques.
• Enabled a 7mHz high-pass cutoff frequency with a 6 pF on-chip integrating capacitor.
• Enhanced input impedance to 5.2 GΩ at 50 Hz within a 30 ms calibration time.
• Fabricated in a 180 nm CMOS process with low current consumption (3.01 μA) and 6.37 NEF.

Conclusions:

• The developed analog front-end successfully achieves ultra-low frequency filtering and high input impedance.
• The integration of DC-OTA and DA-OTA techniques in the O-DSL provides a robust solution for stable DC operation.
• This design offers a promising solution for sensitive low-frequency signal acquisition in various electronic systems.