Impact of drain and source engineering on dual metal InAs-GaSb VTFETs with high-K gate stack design

The performance of a Dual-Metal-InAs-GaSb Vertical Tunnel Field Effect Transistor (DM-InAs-GaSb VTFET) with an InAs source pocket was investigated in relation to the gate dielectric materials. This research chose gate dielectric materials such as SiO₂, Al₂O₃, HfO₂, and ZrO₂. The simulation is performed using the Silvaco Technology Computer-Aided Design (TCAD) software. The drain current (I_ON) of the DM-InAs-GaSb VTFET, which includes an InAs source pocket and an extended drain, is assessed across several dielectric materials; still, ZrO₂ (7.92 × 10^- 5 A/µm) and HfO₂ (8.15 × 10^- 5 A/µm) demonstrate enhanced performance. The transconductance (g_m) values were 606 µS/µm for HfO₂ and 589 µS/µm for ZrO₂. A comparison is performed between the Ge-Si VTFET and the suggested configuration. The proposed DM-InAs-GaSb VTFET demonstrates a 1.5-times increase in ON current (I_ON) and a three-time boost in transconductance (g_m). The frequency response of the proposed device was evaluated by employing its SPICE characteristics to construct the common source amplifier in the SPICE circuit simulator. This amplifier comparison reveals that ZrO₂ and HfO₂ insulators provide significant gain, with HfO₂ displaying a cut-off frequency of 1.808 GHz.