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Field-effect transistors based on an In2Se3-graphene vdW ferroelectric heterojunction for high-performance and
Miao-Wei Zhao1, Jian-Qing Dai1, Jin Yuan1
1Faculty of Materials Science and Engineering, Kunming University of Science and Technology, Kunming 650093, P. R. China. djqkust@kust.edu.cn.
Physical Chemistry Chemical Physics : PCCP
|January 6, 2026
Summary
This study introduces a novel 2D ferroelectric heterojunction FET (FeHJ-FET) using In2Se3/graphene for advanced logic devices. It demonstrates nonvolatile modulation for high-performance, low-power applications, breaking performance limits.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Two-dimensional (2D) ferroelectric materials are key for non-volatile memory but their use in logic devices is underexplored.
- Understanding transport mechanisms at ferroelectric interfaces is crucial for next-generation electronics.
Purpose of the Study:
- To propose and investigate a 2D ferroelectric heterojunction FET (FeHJ-FET) for logic applications.
- To explore the potential of α-In2Se3 as a channel material in advanced FETs.
- To demonstrate nonvolatile modulation of interface properties for enhanced device performance.
Main Methods:
- Density-functional theory (DFT) combined with the non-equilibrium Green's function (NEGF) method.
- Fabrication and characterization of In2Se3/graphene vdW heterojunctions.
- Analysis of Schottky barrier height modulation and transport properties.
Main Results:
- Demonstrated nonvolatile modulation of the interface Schottky barrier height (SBH) by reversing α-In2Se3 polarization, enabling Ohmic contact.
- Achieved excellent on-state current and an ON/OFF ratio of 10^7 in an In2Se3↓/Gr FeHJ-FET with an underlap structure.
- Observed a subthreshold swing breaking the Boltzmann limit, meeting International Roadmap for Devices and Systems (IRDS) 2034 requirements for high-performance (HP) and low-power (LP) logic.
Conclusions:
- α-In2Se3 is a promising channel material for high-performance/low-power logic FETs within the 2D semiconductor framework.
- The engineered vdW ferroelectric heterojunction transistors offer electrostatically reconfigurable interfacial properties.
- This work provides a theoretical basis for designing advanced ferroelectric heterojunction devices.
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