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A memristor-based energy-efficient compressed sensing accelerator with hardware-software co-optimization for edge

Yunrui Jiao1, Han Zhao1, Jianshi Tang1

  • 1School of Integrated Circuits, Beijing Advanced Innovation Center for Integrated Circuits, BNRist, Tsinghua University, Beijing 100084, China.

National Science Review
|January 15, 2026
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Summary
This summary is machine-generated.

This study introduces a novel memristor-based accelerator for compressed sensing (CS), overcoming limitations of traditional hardware. The new system offers significant speed and energy improvements for edge computing applications.

Keywords:
compressed sensingcomputing-in-memoryedge computinghardware–software co-optimizationmemristor chip

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Computer Science

Background:

  • Traditional silicon CMOS hardware faces energy efficiency and latency challenges due to the von Neumann bottleneck, especially with increasing data volumes.
  • Compressed sensing (CS) is crucial for reducing hardware costs and energy consumption through sub-Nyquist sampling, but hardware implementations are limited.
  • The exponential growth of data necessitates innovative hardware solutions beyond conventional CMOS technology.

Purpose of the Study:

  • To propose and evaluate a memristor-based compressed sensing accelerator (memCS) that utilizes computing-in-memory (CIM) to overcome hardware limitations.
  • To analyze the impact of non-ideal memristor device characteristics on CS performance.
  • To develop a hardware-software co-optimization framework for enhanced noise robustness and reconstruction accuracy.

Main Methods:

  • Development of a fully integrated 128 Kb memristor chip for CS acceleration.
  • Systematic analysis of non-ideal memristor device characteristics.
  • Implementation of a hardware-software co-optimization framework including measurement matrix modification (MMM) and sparsity enhancement (SE).

Main Results:

  • The memCS achieved a peak signal-to-noise ratio (PSNR) of 31.11 dB, nearing software performance.
  • The system demonstrated high accuracy (94.2%) in image classification on the ImageNet dataset.
  • Benchmarking showed memCS offers 11.22x speedup and 30.46x energy savings compared to state-of-the-art CMOS hardware.

Conclusions:

  • Memristor-based computing-in-memory offers a scalable and energy-efficient solution for compressed sensing.
  • Hardware-software co-optimization significantly enhances the performance and robustness of memristor-based CS accelerators.
  • The developed memCS technology provides a promising pathway for energy-efficient edge computing applications.