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Updated: Jan 30, 2026

On-Chip Crystallization and Large-Scale Serial Diffraction at Room Temperature
Published on: March 11, 2022
1-MHz linewidth VCSEL enabled by monolithically integrated passive cavity for high-stability chip-scale atomic clocks
Zhiting Tang1, Chuanlin Li1, Xuhao Zhang1
1Institute of Fundamental and Frontier Sciences, University of Electronic Science and Technology of China, Chengdu, 611731, China.
Abstract:
Narrow-linewidth vertical-cavity surface-emitting lasers (VCSELs) are key enablers for chip-scale atomic clocks and quantum sensors, yet conventional designs suffer from short cavity lengths and excess spontaneous emission, resulting in broad linewidths and degraded frequency stability. Here, we demonstrate a monolithically integrated VCSEL operating at the cesium D1 line (894.6 nm) that achieves intrinsic linewidth compression to ~1 MHz, without requiring external optical feedback. This performance is enabled by embedding a passive cavity adjacent to the active region, which spatially redistributes the optical field into a low-loss region, extending photon lifetime while suppressing higher-order transverse and longitudinal modes. The resulting device exhibits robust single-mode operation over a wide current and temperature range, with side-mode suppression ratio (SMSR) > 35 dB, orthogonal polarization suppression ratio (OPSR) > 25 dB and a beam divergence of ~7°. Integrated into a Cesium vapor-cell atomic clock, the VCSEL supports a frequency stability of 1.89 × 10-12 τ-1/2. These results position this VCSEL architecture as a compact, scalable solution for next-generation quantum-enabled frequency references and sensing platforms.
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