SPIRE: A 28nm Memory-Efficient Multi-Reservoir LSM Accelerator for Adaptive and Flexible Time-Series Classification

Area of Science:

• Neuromorphic Engineering
• Artificial Intelligence

Background:

• Spiking Neural Networks (SNNs) excel at sequential data but struggle with long-term dependencies.
• Liquid State Machines (LSMs) offer a solution by separating recurrence and classification, but hardware implementations face memory and performance trade-offs.

Purpose of the Study:

• To develop a compact, memory-efficient, and high-performance multi-reservoir LSM hardware.
• To address the design limitations of existing LSM implementations for time-series classification and edge deployment.

Main Methods:

• Introduced SPIRE, a fully digital multi-reservoir LSM with online learning adaptation in TSMC 28nm CMOS.
• Implemented a parallelized architecture with up to eight reservoir ensembles across four cores.
• Utilized on-the-fly weight generation for reduced memory footprint and supported dual operation modes.

Main Results:

• Achieved a synaptic density improvement of up to 18.46× compared to prior works.
• Demonstrated high computational efficiency: 3.56 GSOPs/mm² (4.91 pJ/SOP) in sequential mode and 76.05 GSOPs/mm² (0.1 pJ/SOP) in parallel mode.
• Operated at 55 MHz and 0.55 V, showcasing power and speed advantages.

Conclusions:

• SPIRE offers a memory-efficient and high-performance solution for neuromorphic computing tasks like time-series classification.
• The design advancements enable practical edge deployment of complex LSM models.
• SPIRE represents a significant step forward in overcoming hardware limitations for brain-inspired computing.