High-Indium-Composition, Ultra-Low-Power GaAsSb/InGaAs Heterojunction Tunnel Field-Effect Transistors

In this work, we report the first systematic examination of how the In composition in the intrinsic In_xGa_1-xAs layer and the p-type doping concentration in the p-type GaAsSb layer affect the device performance of side-gate p-GaAs_0.5Sb_0.5/i-In_xGa_1-xAs/n-In_0.53Ga_0.47As TFETs, using the technology computer-aided design (TCAD) simulations with a non-local band-to-band model. By tuning these two parameters, a moderate staggered alignment is achieved, enabling self-off operation at zero gate bias while maintaining high on-current. This tunability is an intrinsic and significant advantage of the p-GaAsSb/i-In_xGa_1-xAs heterojunction that has not been previously explored. It is found that the best device performance does not occur in the TFET with an In composition of 0.53 in the intrinsic layer, which is lattice-matched to the InP substrate, but rather occurs in the device with a higher In composition of around 0.59 in the InGaAs layer, which has been verified by experimental data to some extent. Optimal parameter combinations yield a minimum subthreshold swing of 13.51 mV/dec and an ON-state current of 35.39 μA/μm at V_DS = V_GS = 0.5 V due to the enhanced tunneling capability.