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Characterization of SiN Integrated Optical Phased Arrays on a Wafer-Scale Test Station
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LightIN: a versatile silicon-integrated photonic field programmable gate array with an intelligent configuration
Ying Zhu1, Yifan Liu1, Xinyu Yang1
1National Information Optoelectronics Innovation Center, China Information and Communication Technologies Group Corporation, Youkeyuan Road 88, Wuhan, 430074, Hubei, China.
Light, Science & Applications
|March 12, 2026
Summary
This study introduces a reconfigurable silicon photonic chip enabling diverse AI cluster functions like computing and encryption. The novel chip achieves high-speed matrix multiplication and image recognition, advancing optoelectronic AI systems.
Area of Science:
- Optoelectronics
- Artificial Intelligence
- Integrated Photonics
Background:
- Artificial Intelligence (AI) models demand significant computing power and high-bandwidth communication, challenging conventional electronic circuits.
- Silicon photonics offers high speed, low latency, and large bandwidth, making it suitable for AI data transmission and photonic neural networks.
- Current silicon photonic chips lack adaptability and hardware-software coordination, hindering the development of advanced photo-electronic AI clusters.
Purpose of the Study:
- To develop a reconfigurable silicon photonic chip for multifunctional AI cluster applications.
- To demonstrate diverse functionalities including computing acceleration, signal processing, network switching, and secure encryption on a single chip.
- To establish a framework for testing and controlling the photonic chip without in-chip monitoring.
Main Methods:
- Development of a reconfigurable silicon photonic chip with 40 programmable unit cells and over 160 components.
- Implementation of a custom testing, compilation, and adjustment framework for chip control.
- Demonstration of matrix multiplication, neural network image recognition, wavelength locking, photonic channel switching, and physical unclonable functions.
Main Results:
- Achieved 4x4 bi-direction unitary and 3x3 uni-direction non-unitary matrix multiplications at over 1.92 TOPS with 6.22-bit precision and 1.875 pJ/MAC energy efficiency.
- Demonstrated neural networks for image recognition with a latency of 260 ps and micro-ring modulator wavelength locking in 5-32 Gb/s systems.
- Showcased 4x4 photonic channel switching with -44 dB inter-channel crosstalk and silicon photonic physical unclonable functions.
Conclusions:
- The developed reconfigurable silicon photonic chip integrates diverse AI functions, addressing limitations of current technologies.
- The novel optoelectronic processing system, including the chip and software stack, enables advanced photonic system-on-chip design.
- This work paves the way for constructing efficient and versatile photo-electronic AI clusters.
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