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Germanium-on-Silicon Waveguide-Integrated Photodiode with Dual Optical Inputs for Datacenter Applications
Itamar-Mano Priel1,2, Shai Cohen2, Liron Gantz2
1Electrical and Computer Engineering Department, Technion-Israel Institute of Technology, Haifa 320003, Israel.
Micromachines
|March 28, 2026
Summary
New photodetectors overcome speed limitations in optical networking. A novel dual-input photodiode design effectively manages high optical powers, enabling faster data transmission in datacenters.
Area of Science:
- Photonics
- Optical Communications
- Semiconductor Devices
Background:
- Exponential growth in compute workloads necessitates higher intra-datacenter interconnect bitrates.
- Advanced modulation formats like PAM4 are adopted but introduce SNR penalties, requiring higher optical powers.
- High optical powers challenge photodetectors due to the space-charge effect, limiting high-speed performance.
Purpose of the Study:
- To design and fabricate a photodiode that overcomes space-charge limitations under high optical power.
- To enable higher bitrates in optical interconnects by improving photodetector performance.
- To maintain low bit error rates (BER) at increased optical power levels.
Main Methods:
- Design and fabrication of a waveguide-integrated photodiode with dual optical inputs (DIPD).
- Implementation of a dual-fed architecture with cross-sectional geometric optimizations.
- Characterization of photodiode performance under high-power illumination and CMOS driving voltages.
Main Results:
- Demonstrated effective distribution of photocurrent density to delay space-charge saturation.
- Achieved high responsivity of approximately 0.91 A/W for O-band wavelengths.
- Obtained a large electro-optic bandwidth (EOBW) of approximately 58 GHz.
Conclusions:
- The developed DIPD photodiode effectively mitigates space-charge effects in high-power optical links.
- This design enables optical networking equipment to meet increasing bitrate demands in datacenters.
- The photodiode operates efficiently under high optical power and standard CMOS driving voltages, paving the way for next-generation interconnects.

