Geometrical Design Schemes for the 2T0C DRAM Cell Using a Vertical Stack Transistor with a Distinctive Single IGZO...

Area of Science:

• Materials Science
• Electrical Engineering
• Semiconductor Physics

Background:

• Three-dimensional (3D) DRAM cells offer increased density but face challenges with transistor interactions.
• Indium Gallium Zinc Oxide (IGZO) is a promising channel material for DRAM due to its thermal sensitivity and electrical properties.

Purpose of the Study:

• To investigate the electrical interactions between write and read transistors in a novel 3D 2-transistor-0-capacitor (2T0C) DRAM cell.
• To establish a control methodology for optimizing the performance of IGZO-based 3D DRAM cells.
• To achieve stable multilevel operation in advanced DRAM architectures.

Main Methods:

• Utilized a discrete active island pattern to suppress parasitic channels in the IGZO channel.
• Performed memory characterization to analyze electrical coupling effects and their impact on storage node voltage (V_SN).
• Implemented asymmetric source/drain electrodes in vertical-channel thin-film transistors for enhanced stability.

Main Results:

• Eliminated subthreshold hump and achieved an excellent subthreshold swing of 154.4 mV/dec.
• Identified parasitic capacitance and electrostatic effects in the 3D structure that reduce V_SN charging efficiency.
• Demonstrated excellent operational stability with V_SN variation below 0.03 V after 1000 s.

Conclusions:

• The discrete active island pattern effectively suppresses parasitic channels, improving DRAM cell characteristics.
• Mitigating electrical coupling effects is crucial for efficient V_SN charging in 3D stacked DRAM.
• The novel 3D DRAM cell design enables stable, long-term, linear 3-bit multilevel operation.