Topology Reconfiguration for NoCs: A Fast Reconfiguration Algorithm Based on Monotonic Path Shifting.

Area of Science:

• Computer Engineering
• Semiconductor Technology
• Network Architecture

Background:

• Network-on-Chip (NoC) is crucial for multi-core communication in advanced semiconductors.
• Component failures degrade NoC performance, necessitating efficient topology reconstruction.
• Existing methods like 2D mesh and REmesh have limitations in regularity, complexity, and cost.

Purpose of the Study:

• To propose a novel Monotonic Path Shift (MPS) topological reconstruction algorithm for REmesh NoCs.
• To address the limitations of conventional methods by improving efficiency and recovery.
• To enhance the stability and performance of NoCs in the presence of core failures.

Main Methods:

• Developed the Monotonic Path Shift (MPS) algorithm for REmesh NoCs with core-level redundancy.
• Localized reconstruction decisions via monotonic paths between failed and redundant cores.
• Incorporated region retention and local fallback to manage path conflicts.

Main Results:

• MPS significantly reduces algorithm time complexity with a proven runtime upper bound.
• Achieved reconstruction success rates comparable to existing ACTR algorithms, even under high fault densities.
• Demonstrated substantial improvements in core reuse rate (approx. 10% increase) and reduced migration time (several orders of magnitude).

Conclusions:

• MPS offers an efficient and effective solution for Network-on-Chip topology reconstruction.
• The algorithm enhances resource utilization and accelerates recovery, lowering online overhead.
• MPS contributes to more robust and stable semiconductor systems through rapid, localized fault recovery.