Adaptive Ising Machine Based on Phase Locking of an Auto-Oscillator to a Biharmonic External Driving with Noise

An auto-oscillator driven by a harmonic signal at about twice its free-running frequency is characterized by a bistable phase dynamics where the two states are separated by π radians. This phase bistability enables an oscillator to emulate a single Ising spin, providing a fundamental building block for the oscillator-based Ising machines (OIM). At the same time, a driving signal close to the oscillator free-running frequency locks the oscillator's phase at a single value, playing the role of a magnetic field bias in ensembles of real spins. We introduce a universal theory of phase auto-oscillators driven by a biharmonic signal (having frequency components close to single and double of the free-running oscillator frequency) with noise; with it, we show how deterministic phase locking and stochastic phase slips can be continuously tuned by varying the relative amplitudes and frequencies of the driving components. Using, as an example, a spin-torque nano-oscillator, we numerically validate this theory by implementing a deterministic Ising machine paradigm, a probabilistic one, and dual-mode operation of the two. This demonstration introduces the concept of adaptive Ising machines (AIM), a unified oscillator-based architecture that dynamically combines both regimes within the same hardware platform by properly tuning the amplitudes of the biharmonic driving relative to the noise strength. Benchmarking on different classes of combinatorial optimization problems, the AIM exhibits complementary performance compared to OIMs and probabilistic Ising machines, with adaptability to the specific problem class. This Letter introduces the first OIM capable of transitioning between deterministic and probabilistic computation taking advantage of a proper design of the trade-off between the strength of phase-locking of an auto-oscillator to a biharmonic external driving and noise, opening a path toward scalable, CMOS-compatible hardware for hybrid optimization and inference.