Novel Monolithic CAVET-HEMT Integration for Inverting-Switch Operation

This work presents a monolithic GaN-based CAVET-HEMT, a novel device that integrates a channel aperture vertical electron transistor (CAVET) with a lateral high electron mobility transistor (HEMT) into a single compact structure. The internal cascade allows the CAVET to deliver a voltage-modulated signal to the HEMT channel with 180° phase inversion, producing the device's distinctive inverting-switch behavior, in contrast to the normal switching operation of conventional HEMTs. This internal integration eliminates the need for external interconnections, reducing parasitic losses while enabling enhanced voltage control and faster device response. Electrical characterization highlights the superior performance of the CAVET-HEMT. It achieves a saturation current (I _D,sat) of 0.707 A/mm, significantly higher than the 0.290 A/mm of the HEMT, and exhibits a peak transconductance (|g _m|) of 4.296 S/mm, compared to 0.064 S/mm for the HEMT. The triode operating range (ΔV _triode) is compressed to 1.15 V, reflecting a 5.43× improvement in gate-voltage sensitivity relative to HEMTs. Additionally, the device demonstrates a lower on-resistance (R _on) of 11.61 Ω·mm, while the output conductance (g _d) reaches 0.088 S/mm, indicating strong current-driving capability. Despite increased parasitic capacitance, high-frequency operation is maintained with f _T = 3.5 GHz and f _max = 6.5 GHz, slightly exceeding HEMT performance (by ∼13% and ∼8.3%, respectively) and confirming that the CAVET-HEMT effectively enhances transconductance without being limited by added capacitances. Overall, the proposed CAVET-HEMT conceptually combines superior current-handling, sharp transconductance, high-frequency performance, and inverting-switch functionality within a monolithic architecture. By embedding cascading behavior directly into the device structure, it opens new possibilities for compact, high-speed, and high-power switching and even logic applications (acting as a NOT logic gate). This approach represents a paradigm shift in GaN device design, demonstrating that integrated vertical-lateral architectures can achieve performance levels traditionally requiring multiple discrete stages, while offering new functionality and operational versatility.