Ferroelectric Gate-All-Around Transistors for 3D-Integrated Electronics and Neuromorphic Vision

Area of Science:

• Materials Science
• Electrical Engineering
• Computer Science

Background:

• Edge computing requires high-performance, low-power, and compact electronics for AI and IoT.
• Traditional CMOS devices face limitations in achieving these demands simultaneously.
• Developing novel architectures is crucial for next-generation edge intelligence processors.

Purpose of the Study:

• To propose and demonstrate an all-two-dimensional low-power transistor with a ferroelectric gate-all-around (Fe-GAA) architecture.
• To enable energy-efficient 3D-integrated electronics and neuromorphic edge computing.
• To overcome the Boltzmann limit in traditional CMOS devices.

Main Methods:

• Fabrication of Fe-GAA transistors using a ferroelectric gate material (CuInP2S6).
• Characterization of device performance, including subthreshold swing, on/off ratio, and mobility.
• Demonstration of binary logic operations and artificial neuron emulation (leaky integrate-and-fire) on a unified hardware platform.
• Implementation of a spiking neural network (SNN) for gesture recognition.

Main Results:

• Fe-GAA transistors achieved sub-60 mV dec⁻¹ switching (down to 25.3 mV dec⁻¹), a high on/off ratio (10⁸), and high mobility (310 cm² V⁻¹ s⁻¹).
• Monolithic 3D-integrated logic circuits reduced footprint by 50% compared to planar CMOS.
• Artificial neurons emulated LIF behavior without extra components, significantly reducing energy consumption and hardware footprint.
• The SNN achieved 92.71% accuracy for gesture recognition on the DVS128Gesture dataset.

Conclusions:

• The Fe-GAA architecture offers a paradigm for multifunctional edge intelligence processors.
• This technology transcends traditional power-area trade-offs, enabling compact and energy-efficient edge computing.
• The study paves the way for advanced neuromorphic computing and 3D-integrated electronics.