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Related Concept Videos

MOS Capacitor01:25

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
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A diode is reverse-biased when the positive terminal of an external voltage source is connected to the n-type material and the negative terminal to the p-type material. This configuration opposes the natural direction of current flow through the diode, effectively increasing the width of the depletion region and the barrier potential. The reverse bias condition produces a minimal leakage current, primarily due to minority charge carriers. This leakage becomes significant when the reverse...
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Related Experiment Video

Updated: Jun 13, 2026

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
09:49

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A low-power buffer-assisted 14T ternary SRAM.

Shams Ul Haq1, Erfan Abbasian2, Abdolreza Darabi3

  • 1Department of Electronics and Communication Engineering, Jamia Millia Islamia, New Delhi, 110025, India.

Scientific Reports
|June 11, 2026
PubMed
Summary

This study introduces a novel, power-efficient ternary static random-access memory (TSRAM) cell using carbon nanotube field-effect transistors (CNTFETs). The design significantly reduces energy consumption and improves performance for low-power applications like medical imaging.

Keywords:
CNTFETImage processingStatic noise margin (SNM)Ternary SRAM (TSRAM)Ternary buffer (TBUF)Ternary logic

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Area of Science:

  • * Electronics and Computer Engineering
  • * Materials Science and Nanotechnology

Background:

  • * Ternary static random-access memory (TSRAM) offers enhanced energy efficiency and information density beyond binary systems.
  • * Existing TSRAM designs often require dual supply rails and complex voltage division, leading to higher power consumption and delay.
  • * Carbon nanotube field-effect transistors (CNTFETs) present a promising alternative for low-power, high-density memory applications.

Purpose of the Study:

  • * To propose and evaluate a novel, power-efficient single-supply 14-transistor CNTFET-based TSRAM cell.
  • * To demonstrate the cell's performance advantages, including reduced power and delay, and robust stability.
  • * To assess the practical effectiveness of the proposed TSRAM in a ternary medical image processing framework.

Main Methods:

  • * Design of a buffer-based topology TSRAM cell with a single-bitline read/write scheme using 14 CNTFETs.
  • * Power-efficient single-supply operation eliminating dual voltage rails.
  • * Performance evaluation through HSPICE simulations using the Stanford CNTFET compact model.
  • * Integration into a ternary medical image processing framework with hardware-based signal mapping and a weighted k-nearest neighbor classifier.

Main Results:

  • * Achieved the lowest power-delay product of 5.37 aJ at 0.9 V, outperforming existing TSRAM cells.
  • * Demonstrated competitive static noise margin under process variations.
  • * Application-level testing showed a 26.65% reduction in average energy consumption for medical image processing.
  • * Achieved high performance metrics in medical image processing: 41.06 dB PSNR, 99.83% SSIM, and 97.86% prediction accuracy.
  • * A comprehensive figure of merit confirmed a 61.58% improvement over existing designs.

Conclusions:

  • * The proposed single-supply 14T CNTFET-based TSRAM cell offers superior energy efficiency and performance.
  • * The design is highly suitable for low-power, data-intensive applications, particularly in biomedical processing.
  • * This architecture represents a significant advancement for energy-efficient ternary computing systems.