Ultra-Low Power CMOS Logic and Photodetection in WSe₂ Semiconductors by Selective Area Plasma Doping

Among two-dimensional semiconductors, tungsten diselenide (WSe₂) is particularly suitable for monolithic complementary metal-oxide-semiconductor (CMOS) architectures due to its tunable carrier polarity. Surface oxidation has emerged as a simple and effective route to control polarity and enhance p-type behavior; however, despite its widespread use, fundamental characterization of the oxide-induced electrostatic landscape in WSe₂ remains limited. Here, we employ surface oxidation and selective-area oxide removal to form a lateral junction within few-layer WSe₂. We apply a modified broadband electrostatic force microscopy technique to map nanoscale capacitance variations, providing contact-free insight into local carrier dynamics analogous to conventional MOS C-V measurements, probing oxide-induced electronic effects beyond conventional spectroscopy methods. Bias-dependent measurements reveal a distinct p-n junction between oxidized and oxide-removed regions, with a built-in surface potential difference of approximately 120 meV measured by Kelvin probe force microscopy, demonstrating spatially controlled polarity engineering without heterogeneous material integration. Field-effect transistors fabricated on the n- and p-regions integrated into a complementary inverter circuit exhibit ultralow peak static power consumption ∼13 pW at V_D = 1 V, among the lowest reported for WSe₂-based logic circuits. We demonstrate self-powered photovoltaic photodetection resulting from the in-built electric field of the p-n junction, with fast, reproducible submillisecond response, symmetric rise and fall times, linear current-power dependence, and minimal charge trapping─key metrics for robust and reliable photodetection. Together, these results establish oxide-defined lateral p-n junctions in WSe₂ as a compelling platform for reliable, ultralow-power electronic and optoelectronic applications.