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Spare-Row-Based Fault-Tolerant Dynamic Operation Units for RRAM Computing-in-Memory Systems.

Liang-Ying Su¹, Zih-Yu Huang¹, Shih-Hsu Huang¹

¹Department of Electronic Engineering, Chung Yuan Christian University, Taoyuan 320314, Taiwan.

|June 26, 2026

Summary

This summary is machine-generated.

This study introduces a novel fault-tolerant scheme for Resistive Random-Access Memory (RRAM) computing-in-memory systems. The new design overcomes limitations of existing methods, improving system yield without relying on spare rows.

Keywords:

crossbar array integrated circuits multiply-accumulate redundant memories reliability

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Area of Science:

Computer Engineering
Memory Technology
Integrated Circuits

Background:

Resistive Random-Access Memory (RRAM) crossbar architectures face limitations in simultaneous word line activation, hindering parallelism in computing-in-memory (CIM) systems.
Existing dynamic operation units for CIM lack fault tolerance, leading to yield degradation due to defective memory cells.
Previous fault tolerance methods using spare rows are limited by the number of available spares.

Purpose of the Study:

To propose a generalized fault-tolerant scheme for RRAM CIM architectures that is independent of spare row limitations.
To introduce a novel word line activation generator enabling flexible row remapping.
To address the architectural bottleneck and yield degradation issues in RRAM-based CIM.

Main Methods:

Development of a generalized fault-tolerant scheme for RRAM crossbar arrays.
Introduction of a novel word line activation generator for dynamic row remapping.
Implementation and experimental validation of the proposed architecture.

Main Results:

The proposed scheme effectively provides fault tolerance in RRAM CIM systems.
The architecture demonstrates independence from the number of spare rows for fault tolerance.
Minimal area and power overhead were observed with the new design.

Conclusions:

The generalized fault-tolerant scheme significantly enhances the reliability and yield of RRAM CIM systems.
The novel word line activation generator facilitates flexible and efficient row remapping.
This approach offers a scalable solution for fault tolerance in future computing-in-memory applications.