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Related Concept Videos

MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no current...
MOSFET01:16

MOSFET

The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
In an n-MOSFET, the structure includes n-type source and drain...
MOSFET Amplifiers01:17

MOSFET Amplifiers

The MOSFET, when operating in its active region, functions as a voltage-controlled current source. In this region, the gate-to-source voltage controls the drain current. This principle underlies the operation of the transconductance MOSFET amplifier. The output current is directed through a load resistor to convert this amplifier into a voltage amplifier. The output voltage is then obtained by subtracting the voltage drop across the load resistance from the supply voltage. This process results...
Small-Signal Analysis of MOSFET Amplifiers01:23

Small-Signal Analysis of MOSFET Amplifiers

In small-signal analysis, a MOSFET transistor amplifier acts as a linear amplifier when operating in its saturation region. The gate-to-source voltage (VGS) of the MOSFET is the sum of the DC biasing voltage and the small time-varying input signal. This combination sets up the operating point and modulates the drain current (ID) that flows from the drain to the source. When a small AC signal is superimposed on the DC bias voltage at the gate, the instantaneous drain current comprises three...
Biasing of FET01:22

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
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MOSFET: Depletion Mode01:20

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Assembly and Characterization of Biomolecular Memristors Consisting of Ion Channel-doped Lipid Membranes
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A lightweight CMOS-based LIF circuit: modeling and spiking regulation.

Quan Xu1, Yixuan Wang1, Changfeng Li2

  • 1Wang Zheng School of Microelectronics, Changzhou University, Changzhou, 213159 China.

Cognitive Neurodynamics
|July 13, 2026
PubMed
Summary

This study introduces a compact, low-power Leaky Integrate-and-Fire (LIF) circuit for neuromorphic computing. The lightweight spiking circuit demonstrates robust performance and efficient energy consumption, paving the way for large-scale applications.

Keywords:
CMOS technologyEnergy efficiencyLIF circuitSilicon areaSpiking regulation

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Area of Science:

  • Neuromorphic Engineering
  • Integrated Circuit Design
  • Computational Neuroscience

Background:

  • Spike-based neuromorphic computing requires efficient hardware.
  • Lightweight spiking circuits are crucial for large-scale implementations.
  • Existing designs may lack efficiency or robustness.

Purpose of the Study:

  • To present a novel, lightweight CMOS-based Leaky Integrate-and-Fire (LIF) circuit.
  • To demonstrate the circuit's spiking activity and regulatory mechanisms.
  • To analyze its mathematical model, functional characteristics, and robustness.

Main Methods:

  • Design and simulation of a minimalist LIF circuit using CMOS technology (2 P-MOS, 3 N-MOS).
  • Derivation of a mathematical model relating input current to output voltage.
  • Analysis of spiking frequency versus input current intensity.
  • Circuit simulations using Cadence Virtuoso.

Main Results:

  • The LIF circuit accurately implements integration, threshold detection, discharge, and reset functions.
  • Demonstrated robustness against temperature and process variations.
  • Achieved a compact area of [Formula: see text] and low energy consumption of 0.096 pJ/spike (0.18 µm CMOS).

Conclusions:

  • The developed LIF circuit offers a viable approach for compact and low-power neuromorphic hardware.
  • Its efficiency and robustness support its use in large-scale neuromorphic systems.
  • This work contributes to advancing spike-based computing hardware.