A Duty-Cycled PLL and Fractal Antenna Co-Design Architecture for a Low-Power IR-UWB Transmitter in Neural Implants

We present in this paper a low-power impulse-radio ultra-wideband (IR-UWB) transmitter architecture for neural implants. It features a duty-cycled phase-locked loop (PLL) and a co-designed compact fractal antenna. To suppress the carrier frequency drift inherent in open-loop ring oscillators while maintaining ultra-low power consumption, a hybrid PLL-oscillator upconversion scheme integrated with a switch-controlled voltage-holding module is proposed. Operating at a 10% duty cycle, the PLL consumes merely 90 μW and achieves a locking frequency of 4.25 GHz with a peak-to-peak jitter of 2.14 ps. Furthermore, to eliminate the bulky output matching network, an 8 mm × 10 mm coplanar-waveguide-fed fractal antenna is co-designed to present the conjugate impedance required by the power amplifier output, significantly advancing the miniaturization and energy efficiency of the neural implant. The complete transmitter was fabricated in TSMC 40 nm CMOS, with a supply voltage of 1.0 V, and in vitro wireless experiments through 18 mm of porcine tissue validated the design with a total power consumption of 0.58 mW.