Stateful Logic Using Selector-Only-Memory With Tunable Operation Directionality

Area of Science:

• Materials Science
• Computer Engineering
• Electrical Engineering

Background:

• Conventional von Neumann architectures face limitations in energy and area efficiency for edge devices due to the memory bottleneck.
• Processing-in-memory (PIM) offers a solution by enabling computation within memory arrays.
• Stateful logic, a PIM approach, utilizes simple voltage pulses for in-memory computation.

Purpose of the Study:

• To demonstrate stateful logic functionality using a novel selector-only-memory (SOM) device.
• To investigate the unique switching behavior of Sn-doped GeSeTe (SGST) for logic operations.
• To confirm the feasibility of implementing complex logic circuits within memory arrays.

Main Methods:

• Fabrication and characterization of a selector-only-memory (SOM) device based on Sn-doped GeSeTe (SGST).
• Analysis of the device's threshold switching behavior and its tunability via external series resistance.
• Experimental implementation of various stateful logic operations (IMPLY, NAND, NOR, AND, OR) and a half-adder circuit within the SOM array.

Main Results:

• The SGST SOM device exhibited reversible tuning of threshold switching direction due to RC delay effects.
• Successful implementation of multiple stateful logic operations directly within the SOM array.
• Experimental realization of a half-adder circuit, demonstrating the scalability of the PIM approach.

Conclusions:

• The SGST SOM device shows promise for dense, low-power logic-in-memory architectures for edge computing.
• The reconfigurable switching behavior and low off-state current are advantageous for large-scale PIM arrays.
• This work offers a new pathway for designing structurally simple yet functionally versatile stateful logic devices.