Mitigating Hysteresis in Amorphous Tellurium Selenium Oxide P-Type Field-Effect Transistor Via Fermi-Level Tuning

Zhidong Tang1, Ting Liu1, Jianshi Tang1

  • 1School of Integrated Circuits, Beijing Advanced Innovation Center for Integrated Circuits, BNRist, Tsinghua University, Beijing100084, China.

Nano Letters
|August 12, 2026
PubMed
Summary

This study introduces a Fermi-level tuning strategy to improve p-type field-effect transistors (p-FETs) using amorphous tellurium selenium oxide. Aluminum oxide gate dielectrics significantly reduce hysteresis and enhance mobility in these crucial components for advanced electronics.

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