Bottomless Barrier Strategy for Next-Generation Cu Interconnects Using Phenylethyl Mercaptan-Assisted Area-Selective...

Area of Science:

• Materials Science
• Nanotechnology
• Semiconductor Fabrication

Background:

• Traditional self-assembled monolayers (SAMs) are unsuitable for sub-10 nm 3D semiconductor fabrication due to their size and volatility.
• Solution-based processes for SAMs are incompatible with bottomless barrier structures, causing non-uniformity and poor selectivity.
• Existing methods struggle with selective barrier deposition in advanced 3D semiconductor architectures.

Purpose of the Study:

• To develop a bottomless barrier architecture strategy for selective deposition in 3D semiconductor fabrication.
• To introduce a small-molecule inhibitor (SMI) for area-selective atomic layer deposition (AS-ALD) of barrier materials.
• To enable precise deposition of barrier layers on SiO2 sidewalls while exposing Cu surfaces.

Main Methods:

• Utilized area-selective atomic layer deposition (AS-ALD) for selective barrier material deposition.
• Employed phenylethyl mercaptan (PEM) as a Cu-selective passivating agent (SMI).
• Leveraged Cu-S chemisorption and π-π stacking for dense inhibition layer formation on Cu surfaces.
• Directed ZnO ALD exclusively onto SiO2 sidewalls with high selectivity.

Main Results:

• Achieved selective ZnO ALD on SiO2 sidewalls using PEM inhibitor, outperforming bulkier SAMs.
• Demonstrated low-temperature ALD (<150 °C) of ZnO with strong interfacial adhesion and effective Cu diffusion suppression.
• Confirmed efficient removal of PEM inhibitor via H2 molecular or plasma treatments prior to Ru deposition.
• Successfully deposited low-resistivity ALD-Ru liner/seed layers (~15 nm, ~23 μΩ·cm) with excellent step coverage (~100% at AR ~6.3).

Conclusions:

• The developed bottomless barrier strategy offers superior selectivity for 3D semiconductor fabrication.
• The PEM-based AS-ALD approach enables precise deposition of ZnO and Ru layers for advanced interconnects.
• This method is compatible with dual-damascene patterns, paving the way for next-generation semiconductor devices.