Approaching the intrinsic bandwidth limit: A unified method for balanced homodyne detector design

In this paper, we present a unified method for designing balanced homodyne detectors (BHDs) approaching the intrinsic bandwidth limit, based on either transimpedance amplifier (TIA) or low-noise amplifier (LNA) architectures. Unlike conventional design approaches that consider only the frequency response of the readout circuit, the proposed method incorporates the photodiode carrier transit time. The analysis reveals that when the carrier transit time becomes comparable to the rise time of the readout circuit, the overall detector bandwidth is governed by their combined effect rather than by a single dominant mechanism. In the TIA configuration, accounting for this joint contribution, this method eliminates the systematic bandwidth overestimation inherent in traditional single-mechanism models and consistently explains the observed strong bias-voltage dependence and the reduced optimal feedback capacitance. In contrast, in the LNA configuration, the photodiode carrier transit time becomes the dominant bandwidth constraint, making bias-voltage optimization more critical for bandwidth extension. Guided by the proposed method, a BHD employing an S3883 photodiode and cascaded LNAs was designed and optimized, achieving a 3-dB bandwidth of 210 MHz and a signal-to-noise ratio of 11.3 dB at this frequency. The measured performance agrees well with the theoretical analysis, thereby validating its predictive capability and demonstrating its practical value for high-bandwidth BHD design.