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Numerical Characterization of Optical Transmittance Through Planar Multilayer Dielectric Stacks on CMOS Photodiodes
João Fernandes1, Gabriel M Ferreira1,2, João P Carmo3
1Center for Microelectromechanical Systems (CMEMS), School of Engineering, Campus de Azurém, University of Minho, 4800-058 Guimarães, Portugal.
Abstract:
Accurately predicting how incident light propagates through complex dielectric layers is essential for optimizing the design and performance of integrated CMOS (Complementary Metal Oxide Semiconductor) silicon photodiodes without relying on additional costly fabrication processes. To address this need, this work presents a comparative analysis between three numerical approaches for modelling the optical transmission through planar multilayer dielectric stacks, representative of TSMC (Taiwan Semiconductor Manufacturing Company) 65 nm and TSMC 180 nm CMOS technologies. Wave Optics and Ray Optics, implemented in COMSOL Multiphysics, together with the transfer-matrix method implemented in TFCalc, were evaluated by comparing spectral transmittance over the 400 to 1000 nm wavelength range, sensitivity to fabrication process-induced thickness variations, angular responses from 0° to 80°, and computational efficiency. The three methods exhibited excellent agreement, accurately reproducing the interference behavior of both dielectric stacks. The TSMC 65 nm technology showed a more complex optical response, whereas the TSMC 180 nm stack presented generally higher transmittance, above 31% throughout the evaluated spectral range. Process tolerances primarily shifted the spectral position of the interference peaks by approximately 90 nm and 80 nm, for TSMC 65 nm and 180 nm technologies respectively, without significantly altering the overall spectral behavior, while angular averaging from 0° to 60° smoothed the transmittance oscillations expected under practical LED (Light-Emitting Diode) illumination. TFCalc achieved near full-wave accuracy while reducing the computational time from nearly four hours to approximately one second, demonstrating the best accuracy-efficiency trade-off for planar multilayer dielectric stack analysis in CMOS photodiode design.

