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Micromachines|December 29, 2019
Process Optimization of Via Plug Multilevel Interconnections in CMOS Logic DevicesYinhua Cui, Jeong Yeul Jeong, Yuan Gao, et al.
Micromachines|February 12, 2020
Effect of Contact Plug Deposition Conditions on Junction Leakage and Contact Resistance in Multilevel CMOS Logic Interconnection DeviceYinhua Cui, Jeong Yeul Jeong, Yuan Gao, et al.
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