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Tzai-Liang Tzeng

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Materials (Basel, Switzerland)|August 11, 2017
Development of Equivalent Material Properties of Microbump for Simulating Chip Stacking PackagingChang-Chun Lee, Tzai-Liang Tzeng, Pei-Chen Huang
Journal of Nanoscience and Nanotechnology|September 29, 2015
A Resultant Stress Effect of Contact Etching Stop Layer and Geometrical Designs of Poly Gate on Nanoscaled nMOSFETs with a Si1-xGe(x) ChannelChang-Chun Lee, Chuan-Hsi Liu, Zih-Han Chen, et al.
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Showing results (1-10 of 2) with videos related to

Sort By:
Pageof 1
Materials (Basel, Switzerland)|August 11, 2017
Development of Equivalent Material Properties of Microbump for Simulating Chip Stacking PackagingChang-Chun Lee, Tzai-Liang Tzeng, Pei-Chen Huang
Journal of Nanoscience and Nanotechnology|September 29, 2015
A Resultant Stress Effect of Contact Etching Stop Layer and Geometrical Designs of Poly Gate on Nanoscaled nMOSFETs with a Si1-xGe(x) ChannelChang-Chun Lee, Chuan-Hsi Liu, Zih-Han Chen, et al.
Pageof 1