Peipei Deng

1PUBLICATIONS
3CO-AUTHORS
Digital processor architectures
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Publications (1)

|Jul 29, 2024
Prototype development of a three-stage, high-precision, low-jitter, wide-range digital delay generator fully utilizing on-chip resources.

Jinxin Liu, Peipei Deng, Juan Liu

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Frequent Collaborators

1 joint publications

Jinxin Liu

1 joint publications

Juan Liu

1 joint publications

Ying Wang