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Ying Wang

1PUBLICATIONS

3CO-AUTHORS

Digital processor architectures

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Publications (1)

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|Jul 29, 2024

Prototype development of a three-stage, high-precision, low-jitter, wide-range digital delay generator fully utilizing on-chip resources.

Jinxin Liu, Peipei Deng, Juan Liu

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Jinxin Liu

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Peipei Deng

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Juan Liu

Frequent Collaborators

1 joint publications

Jinxin Liu

1 joint publications

Peipei Deng

1 joint publications

Juan Liu

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