在高速包裹互连中对延迟不敏感代码的交叉分析
Bo Sun1, Zhaoxin Xu1
1School of Integrated Circuits, Guangdong University of Technology, Guangzhou 510006, China.
Micromachines
|May 27, 2023
概括
对于延迟不敏感的编码可以减少高速包互连中的交叉通话. 这种技术通过实现更紧密的布线间距来提高空间利用率,这对于先进的集成电路至关重要.
科学领域:
- 电气工程 电气工程
- 计算机工程 计算机工程
- 材料科学 材料科学 材料科学
背景情况:
- 集成电路的开发需要更密集的芯片互连,这给设计带来了挑战.
- 紧密的互连间距增加了空间利用率,但在高速电路中加剧了交叉通话.
研究的目的:
- 将延迟不敏感的编码应用于高速封装互连设计.
- 分析延迟不敏感编码对26GHz互联连接中的交叉通话减少的影响.
主要方法:
- 对包装互连的延迟不敏感编码 (1-of-2和1-of-4) 的实施.
- 在26 GHz的不同布线间距 (1-7 μm) 上对交叉通道性能进行分析.
主要成果:
- 延迟不敏感的编码表现出高的交叉通话免疫力.
- 1-of-2和1-of-4编码电路平均减少了交叉通话峰值的22.9%和17.5%,分别.
- 由于减少交叉通话,实现了更近的布线间距.
结论:
- 对延迟不敏感的编码是一种有效的策略,用于减轻高速包装互连中的交叉通话.
- 这种方法可以提高空间利用率和更密集的互连布局.
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