通过通过成绩表进行危险控制来提高ASIP性能.
Xinbing Zhou1, Yi Man2, Peng Hao3
1School of Information and Communication Engineering, Hainan University, Haikou 570228, China.
Micromachines
|November 27, 2024
概括
这项研究介绍了数字信号处理器 (DSP) 的硬件危险处理器,使用仅0.91%的额外提高了32.75%的性能. 这提高了ASIP设计的性能与成本比率.
科学领域:
- 计算机工程 计算机工程
- 数字信号处理 数字信号处理
- 硬件加速器 硬件加速器
背景情况:
- 应用特定指令集处理器 (ASIP),包括数字信号处理器 (DSP),在人工智能,通信,媒体,游戏和工业控制中越来越多地被采用.
- DSP的好处包括高性能,低功耗,灵活性和减少的使用.
- 在DSP中数据路径加速引入了控制复杂性,如读后写 (RAW) 和写后写 (WAW) 的危险.
研究的目的:
- 为了解决DSP中数据路径加速引起的控制复杂性.
- 与高级编译器解决方案相比,评估硬件危险处理器的有效性.
- 通过基于硬件的危险处理来证明性能改进和效率的提高.
主要方法:
- 实施硬件危险处理器来管理控制复杂性.
- 将硬件解决方案与基于编译器的DSP设计方法进行比较.
- 评估区域的开销和性能改进.
主要成果:
- 提出的硬件解决方案有效地处理RAW和WAW的危险.
- 实现了32.75%的绩效改进.
- 仅需要0.91%的额外面积.
- 其结果是整体绩效与成本比率提高了32%.
结论:
- 基于硬件的危险处理提供了显著的性能增长,DSP的开销最小.
- 这种方法可以提高性能与成本的比率,使其成为ASIP设计的有价值解决方案.
- 该研究强调了硬件解决方案优化DSP性能和资源利用的好处.
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