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Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots
Published on: November 1, 2013
Ge quantum dot memory structure with laterally ordered highly dense arrays of Ge dots
A G Nassiopoulou1, A Olzierski, E Tsoi
1IMEL/NCSR Demokritos, Terma Patriarchou Grigoriou, 153 10 Aghia Paraskevi, Athens, Greece.
Journal of Nanoscience and Nanotechnology
|April 26, 2007
Summary
This study developed a novel MOSFET-type memory using laterally ordered Germanium (Ge) quantum dots. While achieving ordered Ge quantum dots, charge trapping limited the memory window due to difficult erasing processes.
Area of Science:
- Materials Science
- Electrical Engineering
- Nanotechnology
Background:
- Development of advanced memory structures is crucial for next-generation electronics.
- Germanium (Ge) quantum dots offer promising properties for charge storage in memory devices.
- Achieving precise control over quantum dot arrangement is key to optimizing memory performance.
Purpose of the Study:
- To develop a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) type memory structure.
- To achieve lateral ordering of Ge quantum dots within the gate dielectric stack.
- To investigate the charging properties and limitations of the developed Ge quantum dot memory.
Main Methods:
- Fabrication involved focused ion beam (FIB) patterning, chemical treatments, and oxidation steps.
- Self-assembly of 2D arrays of Ge quantum dots on a patterned tunneling oxide.
- Electrical characterization using capacitance-voltage (C-V) measurements to assess charging properties.
Main Results:
- Successfully created laterally ordered Ge quantum dots within the gate dielectric.
- Electrical measurements showed a significant shift in C-V curves due to electron injection.
- Deep trap storage of charges led to difficult erasing and a limited memory window.
Conclusions:
- The study demonstrates a viable method for fabricating ordered Ge quantum dot memory structures.
- Controlled positioning of Ge quantum dots is achievable, but charge trapping presents a challenge.
- Further research is needed to overcome charge erasing limitations and enhance the memory window.

