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Recoded and nonrecoded trinary signed-digit adders and multipliers with redundant-bit representations
Applied Optics
|February 21, 2008
Summary
This study introduces efficient trinary signed-digit (TSD) adders and multipliers using redundant-bit representation. These novel designs reduce minterms and enable 50% memory savings in optical implementations.
Area of Science:
- Digital arithmetic and computer architecture.
- Optical computing and signal processing.
Background:
- Efficient arithmetic operations are crucial for high-performance computing.
- Trinary Signed-Digit (TSD) representation offers advantages in carry-free addition.
- Existing TSD adder designs can be complex and memory-intensive.
Purpose of the Study:
- To develop highly-efficient two-step recoded and one-step nonrecoded TSD adders-subtracters.
- To explore optical implementation possibilities and memory optimization.
- To present novel multiplication designs utilizing the proposed TSD adders.
Main Methods:
- Utilizing redundant-bit representation for TSD operands.
- Implementing recoded and nonrecoded TSD addition logic.
- Designing multiplication schemes based on TSD adders.
- Applying pipelined iterative-tree algorithms for TSD adders-multipliers.
Main Results:
- Achieved highly-efficient two-step recoded (24 minterms) and one-step nonrecoded (30 minterms) TSD addition.
- Demonstrated potential for 50% system memory saving in optical implementations.
- Presented four novel multiplication designs with reduced minterm requirements.
- Showcased efficient utilization of adders through pipelined algorithms.
Conclusions:
- The proposed TSD adders-subtracters offer significant efficiency improvements.
- Optical implementation is feasible, leading to substantial memory reduction.
- Novel TSD-based multiplication designs enhance performance and reduce resource needs.
- Integration with pipelined algorithms optimizes adder utilization in complex arithmetic units.
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