Search research articles

ABOUT JoVE

Overview Leadership Blog JoVE Help Center

AUTHORS

Publishing Process Editorial Board Scope & Policies Peer Review FAQ Submit

LIBRARIANS

Testimonials Subscriptions Access Resources Library Advisory Board FAQ

RESEARCH

JoVE Journal Methods Collections JoVE Encyclopedia of Experiments Archive

EDUCATION

JoVE Core JoVE Business JoVE Science Education JoVE Lab Manual Faculty Resource Center Faculty Site

Terms & Conditions of Use

Related Concept Videos

Biasing of Metal-Semiconductor Junctions

Biasing of Metal-Semiconductor Junctions

Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...

Metal-Semiconductor Junctions

Metal-Semiconductor Junctions

The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The semiconductor's...

Biasing of P-N Junction

Biasing of P-N Junction

The operation of a p-n junction diode involves various biasing conditions, including forward bias, reverse bias, and equilibrium.
In equilibrium, no external voltage is applied across the p-n junction. The depletion region is formed at the junction interface due to the diffusion of carriers, which leaves behind charged dopants, acceptors on the p-side, and donors on the n-side. These immobile charges create an electric field that prevents further diffusion of carriers. The related energy band...

MOSFET: Enhancement Mode

MOSFET: Enhancement Mode

Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no current...

Biasing of FET

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the gate...

P-N junction

P-N junction

A p-n junction is formed when p-type and n-type semiconductor materials are joined together. At the interface of the p-n junction, holes from the p-side and electrons from the n-side begin to diffuse into the opposite sides due to the concentration gradient. This diffusion of carriers leads to a region around the junction where there are no free charge carriers, known as the depletion region. The charge density within the depletion region for the n-side and p-side can be described by the...

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by

Same author

g-Factor Theory of Si/SiGe Quantum Dots: Spin-Valley and Giant Renormalization Effects.

Physical review letters·2026

Same author

Valley splitting correlations across a silicon quantum well containing germanium.

Nature communications·2025

Same author

A strategy for realizing van der Waals Josephson junction arrays.

Nanoscale·2025

Same author

Engineering Ge Profiles in Si/SiGe Heterostructures for Increased Valley Splitting.

Nano letters·2025

Same author

Refining Au/Sb alloyed ohmic contacts in undoped Si/SiGe strained quantum wells.

Journal of physics. Condensed matter : an Institute of Physics journal·2025

Same author

On-chip cryogenic low-pass filters based on finite ground-plane coplanar waveguides for quantum measurements.

The Review of scientific instruments·2025

Search research articles

Related Experiment Video

Updated: Jun 21, 2026

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Published on: June 3, 2015

Charge sensing and controllable tunnel coupling in a Si/SiGe double quantum dot.

C B Simmons¹, Madhu Thalakulam, B M Rosemeyer

¹University of Wisconsin-Madison, Madison, Wisconsin 53706, USA. cbsimmons@wisc.edu

|August 4, 2009

Summary

We demonstrate tunable double quantum dots in silicon, controlling the tunnel coupling between dots using gate voltage. This is key for developing silicon spin qubits.

More Related Videos

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots

Published on: November 1, 2013

Scalable Quantum Integrated Circuits on Superconducting Two-Dimensional Electron Gas Platform

Scalable Quantum Integrated Circuits on Superconducting Two-Dimensional Electron Gas Platform

Published on: August 2, 2019

Related Experiment Videos

Last Updated: Jun 21, 2026

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Published on: June 3, 2015

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots

Published on: November 1, 2013

Scalable Quantum Integrated Circuits on Superconducting Two-Dimensional Electron Gas Platform

Scalable Quantum Integrated Circuits on Superconducting Two-Dimensional Electron Gas Platform

Published on: August 2, 2019

Area of Science:

Quantum Computing
Condensed Matter Physics
Semiconductor Nanostructures

Background:

Silicon-Germanium (Si/SiGe) heterostructures are promising platforms for quantum computing.
Fabricating and controlling double quantum dots is essential for realizing qubits.

Purpose of the Study:

To investigate the tunability of a Si/SiGe double quantum dot.
To measure and analyze the tunnel coupling between the quantum dots.

Main Methods:

Integrated charge sensing measurements were performed on a Si/SiGe double quantum dot device.
The device was tuned from a single- to a double-dot regime using gate voltages.
Tunnel coupling (t) was extracted as a function of gate voltage.

Main Results:

The Si/SiGe double quantum dot is tunable, transitioning between single and well-isolated double dot configurations.
Charge sensing enabled the extraction of tunnel coupling (t) as a function of top gate voltage.
The tunnel coupling exhibited an exponential dependence on the applied gate voltage, indicating barrier control.

Conclusions:

Precise control over the tunnel coupling in Si/SiGe double quantum dots was achieved.
This gate-voltage-controlled coupling is a critical advancement for manipulating spin qubits in silicon.
The findings pave the way for scalable silicon quantum dot architectures.