Vertical InAs nanowire wrap gate transistors with f(t) > 7 GHz and f(max) > 20 GHz

Area of Science:

• Semiconductor device physics
• Nanotechnology
• Materials science

Background:

• Vertical nanowire transistors offer potential for miniaturized electronic circuits.
• III-V semiconductor nanowires, such as InAs, are promising materials for advanced transistors.
• Wrap-gate designs enable efficient control over nanowire channel properties.

Purpose of the Study:

• To investigate the high-frequency performance of vertically standing InAs nanowire wrap-gate MOSFETs.
• To assess the feasibility of using these devices in high-frequency integrated circuits.

Main Methods:

• Fabrication of InAs nanowire MOSFETs epitaxially grown on InP substrates.
• Definition of all three terminals (gate, source, drain) using wrap-around contacts.
• S-parameter measurements on a matrix of 70 nanowire MOSFETs with ~100 nm gate length.

Main Results:

• Achieved a unity current gain cutoff frequency (f(t)) of 7.4 GHz.
• Observed a maximum frequency of oscillation (f(max)) exceeding 20 GHz.
• Demonstrated successful high-frequency operation of vertical InAs nanowire MOSFETs.

Conclusions:

• Vertically standing InAs nanowire wrap-gate MOSFETs exhibit promising high-frequency characteristics.
• The fabrication technique is suitable for developing high-frequency integrated circuits.
• These devices represent a viable platform for future high-speed electronics.