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Related Experiment Video

Updated: Jun 5, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities

Published on: July 24, 2015

Large-scale graphene transistors with enhanced performance and reliability based on interface engineering by

Zihong Liu¹, Ageeth A Bol, Wilfried Haensch

¹IBM T J Watson Research Center, Yorktown Heights, New York 10598, USA. zliu@us.ibm.com

|December 22, 2010

Summary

Self-assembled monolayers (SAMs) enhance large-scale graphene transistors by improving performance and reliability. This interface engineering significantly boosts mobility and reduces instability in chemical vapor deposited (CVD) graphene devices.

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Development and Functionalization of Electrolyte-Gated Graphene Field-Effect Transistor for Biomarker Detection

Published on: February 1, 2022

Area of Science:

Materials Science
Condensed Matter Physics
Nanotechnology

Background:

Large-scale graphene transistors are crucial for next-generation electronics.
Dielectric/graphene interface quality significantly impacts device performance and stability.
Chemical vapor deposited (CVD) graphene often suffers from interface-related limitations.

Purpose of the Study:

To investigate the physics and engineering of the dielectric/graphene interface.
To improve the performance and reliability of large-scale CVD graphene transistors.
To explore the use of self-assembled monolayers (SAMs) for interface modification.

Main Methods:

Fabrication of large-scale CVD graphene transistors.
Self-assembly of organosilane monolayers (phenyl-alkyl-terminated SAMs) on dielectric surfaces.
Characterization of device performance, including field-effect mobility, bias stress instability, and hysteresis.
Analysis of interface properties using electrical measurements and modeling (stretched exponential model).

Main Results:

Phenyl-alkyl-terminated SAMs significantly improve dielectric/graphene interface properties.
Extrinsic field-effect mobility reached up to 2500 cm²/Vs at room temperature for SAM-engineered devices.
Substantial reduction in bias stress instability and hysteresis was observed with SAMs.
Charge injection from graphene to the interface identified as a key factor in hysteresis.

Conclusions:

SAMs are effective in engineering the dielectric/graphene interface for enhanced device performance.
Interface modification with SAMs leads to higher mobility and improved reliability in CVD graphene transistors.
The study provides insights into interface physics governing hysteresis and bias stress stability.